1. Field of the Invention
The present invention relates to chemical mechanical polishing (CMP) systems and techniques for improving the performance of CMP operations.
2. Description of the Related Art
In the fabrication of semiconductor devices, there is a need to perform chemical mechanical polishing (CMP) operations, buffing and wafer cleaning. Typically, integrated circuit devices are in the form of multi-level structures. At the substrate level, transistor devices having diffusion regions are formed. In subsequent levels, interconnect metallization lines are patterned and electrically connected to the transistor devices to define the desired functional device. As is well known, patterned conductive layers are insulated from other conductive layers by dielectric materials, such as silicon dioxide. As more metallization levels and associated dielectric layers are formed, the need to planarize the dielectric material increases. Without planarization, fabrication of additional metallization layers becomes substantially more difficult due to the higher variations in the surface topography. In other applications, metallization line patterns are formed in the dielectric material, and then metal CMP operations are performed to remove excess metallization.
FIG. 1A shows a schematic diagram of a chemical mechanical polishing (CMP) process 10, consisting of a CMP system 14, a wafer cleaning system 16, and post-CMP processing 18. After a semiconductor wafer 12 undergoes a CMP operation in the CMP system 14, the semiconductor wafer 12 is cleaned in a wafer cleaning system 16. The semiconductor wafer 12 then proceeds to post-CMP processing 18, where the wafer may undergo one of several different fabrication operations, including additional deposition of layers, sputtering, photolithography, and associated etching.
A CMP system 14 typically includes system components for handling and polishing the surface of the wafer 12. Such components can be, for example, an orbital or rotational polishing pad, or a linear belt polishing pad. The pad itself is typically made of a polyurethane material. In operation, the belt pad is put in motion and then a slurry material is applied and spread over the surface of the belt pad. Once the belt pad having slurry on it is moving at a desired rate, the wafer is lowered onto the surface of the belt pad. Similarly, in rotational or orbital CMP systems, a polishing pad is located on a rotating planar surface, and slurry is introduced. The wafer, mounted on a polishing carrier is lowered onto the surface of the polishing pad. In this manner, the wafer surface that is desired to be planarized is substantially smoothed. The wafer is then sent to be cleaned in the wafer cleaning system 16.
With the increasing necessity for multi-layered complex structures fabricated on larger wafer substrates, more accurate measurement and control of the CMP process is required than provided by current technology. The goal of the CMP process should be to maximize the removal rate and uniformity. As is well known, the removal rate can be determined by Preston""s Equation: Removal Rate=KpPV, where the removal rate of material in Angstroms/minute is a function of Downforce (P) and Linear Velocity (V), with Kp being the Preston Coefficient, a constant determined by the chemical composition of the slurry, the process temperature, and the pad surface.
Therefore, one way to increase the removal rate can be to apply the wafer against the polishing pad with increased amounts of pressure (e.g., downforce). However, when the wafer is applied to the pad with excessive force, the wafer can suffer in that stress will be transferred to the brittle wafer which could cause the wafer to break, and excessive force can cause non-uniform removal rates. In addition, a high downforce is limited by stall friction produced by high pressure on the surface of the wafer, and by motor torque, Further, it has been shown that increasing downforce can actually decrease both local and global uniformity.
Another way to increase removal rates and uniformity is to increase the velocity of the polishing pad. The increase in velocity can also be done in conjunction with the application of more pressure. The limiting factors for achieving increased linear velocity include carrier size and mass, the larger physical size of the CMP system and motor torque. For example, some belt-type CMP systems can be quite large, thus requiring more torque and power to move the belt. Consequently, linear velocity in conventional CMP systems cannot be efficiently increased.
If linear velocity were somehow increased, a hydroplaning effect could start to occur between the surface of the wafer and the polishing pad. Hydroplaning is believed to occur due to the increased linear velocity of the wafer and the fact that a film of chemical s (e.g., slurry) cover the polishing pad surface.
To illustrate another problem with conventional CMP systems, reference will now be made to FIGS. 1B-1C. As is well known, present CMP systems are used to remove metallization material, such as copper, to isolate metal lines in an oxide layer. In FIG. 1B, an oxide layer 102 is shown over a substrate 100. Trenches 102a-102d have been etched in the oxide layer 102 that will be used to create metal lines within the oxide layer 102. Prior to applying the metal layer 104, a thin barrier or liner layer (not shown) is deposited over the entire surface. As is known, materials such as silicon nitride, titanium itride, and the like are used for the barrier. Then, the metal layer 104 is applied over the oxide layer 102 completely filling the illustrated trenches 102a-102d. In FIG. 1C, conventional CMP has been performed on the metal layer 104 to remove the excess metal, and barrier, and smooth the surface at the oxide layer 102 such that the trenches 102a-102d stay filled with the remaining metal from the metal layer 104, and running throughout the oxide layer 102 as metal lines.
As shown in FIG. 1C, deformities known as xe2x80x9cerosionxe2x80x9d and xe2x80x9cdishingxe2x80x9d occur on the planarized surface at points 106 and 108 respectively. In current technology CMP systems, the entire surface of the wafer is always in contact with and polished by the polishing belt or pad and slurry. Because of the differences in hardness of the oxide, the barrier, and the metal layers, rate of removal changes significantly as the layers are processed and the different layers are exposed. The softer metal layer 104 is removed at a higher rate than both the harder barrier and oxide. Once the metal layer is removed in the oxide regions 106 between the metal lines 104, continued processing can result in the dishing shown in the metal lines at 108. Continued processing, however, is necessary to remove the barrier layer over the oxide. The process known as xe2x80x9cover-polishingxe2x80x9d is often needed to compensate for variations in thickness, but too much over-polish can result in erosion or localized thinning of the oxide illustrated at points 106. As is well known, dishing and erosion 106 can have a negative impact on the performance of a finished integrated circuit fabricated from the wafer.
In view of the foregoing, there is a need for CMP systems that efficiently allow increases in linear velocity and also allow increased amounts of force to be applied against the wafer without the disadvantages of the prior art. The increases in linear velocity and force should be controlled to achieve increased removal rates and uniformity of the planarized surface of the wafer.
Broadly speaking, the present invention fills these needs by providing a CMP system that provides increased, uniform, and controllable removal rates. The CMP system allows for significant increases in linear velocity over the prior art without the previously associated detrimental effects of dishing, erosion, and hydroplaning, and can incorporate real-time in-situ monitoring of material removal to provide precise and controllable wafer processing. It should be appreciated that the present invention can be implemented in numerous ways, including as a process, an apparatus, a system, a device or a method. Several inventive embodiments of the present invention are described below.
In one embodiment, a CMP system is disclosed. The CMP system includes a carrier that holds and rotates a wafer. The wafer is held on the carrier so that the surface to be processed is exposed. The system also includes a roller that is covered by a process surface such as a pad or brush as use d in CMP or buffing operations. The roller rotates so that the rotating process surface is applied against the rotating wafer at a roller contact region. The roller contact region has a surface area that is less than the wafer surface area. In addition to rotational movement, the roller also has transverse movement, and as the roller is applied against the wafer surface, the roller also moves across the wafer from one region to another. In this manner, the entire surface area of the wafer is processed.
In another embodiment, a method for chemical mechanical polishing is disclosed. The method includes rotating a carrier that hold s a wafer. The carrier holds the wafer so that the surface of the wafer to be processed is exposed. The method further includes rotating a roller about an axis of rotation. The roller is covered by a process surface such as a pad or brush as used in CMP or buffing operations. The rotating process surface is applied against the rotating wafer surface to define the roller contact region. The area of the roller contact region is less than the area of the wafer surface. The roller contact region is further moved transversely across the surface of the wafer to accomplish the CMP or buffing process.
In yet another embodiment, a method for preparing a surface of a wafer is disclosed. The method includes rotating the wafer and applying a rotating surface onto a portion of the wafer. The rotating surface is then moved between a first region and a second region of the wafer. The method further includes defining a linear velocity at a contact surface of the wafer, and applying a force against the wafer at the contact surface. By manipulating the force and linear velocity at the contact surface, the rate of removal and therefore the process of preparing a surface of a wafer is controlled. The rate of removal can also be monitored by implementing a sensor that provides feedback information regarding the removal rate.
The advantages of the present invention are many and substantial. Most notably, the control and precision of the CMP or buffing processes achieved allows for the fabrication of more complex multi-layered integrated circuits. The ability to increase linear velocity and pressure during processing increases the rate of removal over prior art. Not only does this result in a higher processing throughput, but the processing at a surface contact region of the wafer instead of the prior art continuous, full-surface processing, yields a more controllable and uniform planarized surface.
Another advantage of the present invention is the embodiment that includes a sensor to monitor real-time, in-situ material removal. Prior art necessarily evaluates material removal to manipulate the parameters of processing, but the present invention provides for measurement and evaluation during the processing operation. This ability to manipulate the process as it proceeds and based on the material and environmental conditions of the actual wafer being processed while it is being processed makes the processing more efficient and more precise. The demand for more complex multi-layered integrated circuits requires the ability to precisely and uniformly planarize multi-layered surfaces, and the present invention meets that need.
Finally, a preferred embodiment of the present invention affords a more efficient and more economical use of precious fab floor space. The vertical orientation substantially reduces the system footprint of prior art and enhances overall process control.
Other aspects and advantages of the present invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the present invention.